1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
|
#pragma once
// DISCLAIMER:
// THIS FILE IS CREATED FROM SCRATCH, BY READING THE OFFICIAL IGCL API
// DOCUMENTATION REFERENCED BELOW, IN ORDER TO MAKE FASTFETCH MIT COMPLIANT.
#include <stdint.h>
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv412ctl_result_t
typedef enum ctl_result_t {
CTL_RESULT_SUCCESS = 0,
} ctl_result_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctl_application_id_t
typedef struct ctl_application_id_t {
uint32_t Data1;
uint16_t Data2;
uint16_t Data3;
uint8_t Data4[8];
} ctl_application_id_t;
#define CTL_IMPL_VERSION ((1 /*major*/ << 16) | (1 /*minor*/ & 0x0000ffff))
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_init_flag_t
typedef enum ctl_init_flag_t {
CTL_INIT_FLAG_USE_LEVEL_ZERO = 1,
CTL_INIT_FLAG_MAX
} ctl_init_flag_t;
typedef uint32_t ctl_version_info_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_init_args_t
typedef struct ctl_init_args_t {
uint32_t Size;
uint8_t Version;
ctl_version_info_t AppVersion;
ctl_init_flag_t flags;
ctl_version_info_t SupportedVersion;
ctl_application_id_t ApplicationUID;
} ctl_init_args_t;
typedef struct ctl_api_handle_t* ctl_api_handle_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv47ctlInitP15ctl_init_args_tP16ctl_api_handle_t
extern ctl_result_t ctlInit(ctl_init_args_t* pInitDesc, ctl_api_handle_t* phAPIHandle);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlclose
extern ctl_result_t ctlClose(ctl_api_handle_t hAPIHandle);
typedef struct ctl_device_adapter_handle_t* ctl_device_adapter_handle_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv419ctlEnumerateDevices16ctl_api_handle_tP8uint32_tP27ctl_device_adapter_handle_t
extern ctl_result_t ctlEnumerateDevices(ctl_api_handle_t hAPIHandle, uint32_t* pCount, ctl_device_adapter_handle_t* phDevices);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_device_type_t
typedef enum ctl_device_type_t {
CTL_DEVICE_TYPE_GRAPHICS = 1,
CTL_DEVICE_TYPE_SYSTEM = 2,
CTL_DEVICE_TYPE_MAX
} ctl_device_type_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctl_firmware_version_t
typedef struct ctl_firmware_version_t {
uint64_t major_version;
uint64_t minor_version;
uint64_t build_number;
} ctl_firmware_version_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_adapter_bdf_t
typedef struct ctl_adapter_bdf_t {
uint8_t bus;
uint8_t device;
uint8_t function;
} ctl_adapter_bdf_t;
#define IGCL_CTL_MAX_DEVICE_NAME_LEN 100
#define IGCL_CTL_MAX_RESERVED_SIZE 112
typedef enum ctl_adapter_properties_flag_t {
CTL_ADAPTER_PROPERTIES_FLAG_INTEGRATED = 1,
} ctl_adapter_properties_flag_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv431ctl_device_adapter_properties_t
typedef struct ctl_device_adapter_properties_t {
uint32_t Size;
uint8_t Version;
void* pDeviceID;
uint32_t device_id_size;
ctl_device_type_t device_type;
uint32_t /*ctl_supported_functions_flags_t*/ supported_subfunction_flags;
uint64_t driver_version;
ctl_firmware_version_t firmware_version;
uint32_t pci_vendor_id;
uint32_t pci_device_id;
uint32_t rev_id;
uint32_t num_eus_per_sub_slice;
uint32_t num_sub_slices_per_slice;
uint32_t num_slices;
char name[IGCL_CTL_MAX_DEVICE_NAME_LEN];
ctl_adapter_properties_flag_t graphics_adapter_properties;
uint32_t Frequency;
uint16_t pci_subsys_id;
uint16_t pci_subsys_vendor_id;
ctl_adapter_bdf_t adapter_bdf;
char reserved[IGCL_CTL_MAX_RESERVED_SIZE];
} ctl_device_adapter_properties_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctlGetDeviceProperties27ctl_device_adapter_handle_tP31ctl_device_adapter_properties_t
extern ctl_result_t ctlGetDeviceProperties(ctl_device_adapter_handle_t hDAhandle, ctl_device_adapter_properties_t* pProperties);
typedef struct ctl_temp_handle_t* ctl_temp_handle_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlenumtemperaturesensors
extern ctl_result_t ctlEnumTemperatureSensors(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_temp_handle_t* phTemperature);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv427ctlTemperatureGetProperties17ctl_temp_handle_tP21ctl_temp_properties_t
typedef enum ctl_temp_sensors_t {
CTL_TEMP_SENSORS_GLOBAL = 0,
CTL_TEMP_SENSORS_GPU = 1,
CTL_TEMP_SENSORS_MEMORY = 2,
CTL_TEMP_SENSORS_GLOBAL_MIN = 3,
CTL_TEMP_SENSORS_GPU_MIN = 4,
CTL_TEMP_SENSORS_MEMORY_MIN = 5,
CTL_TEMP_SENSORS_MAX
} ctl_temp_sensors_t;
typedef struct _ctl_temp_properties_t {
uint32_t Size;
uint8_t Version;
ctl_temp_sensors_t type;
double maxTemperature;
} ctl_temp_properties_t;
extern ctl_result_t ctlTemperatureGetProperties(ctl_temp_handle_t hTemperature, ctl_temp_properties_t* pTemperature);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctlEnumMemoryModules27ctl_device_adapter_handle_tP8uint32_tP16ctl_mem_handle_t
typedef struct ctl_mem_handle_t* ctl_mem_handle_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctlEnumMemoryModules27ctl_device_adapter_handle_tP8uint32_tP16ctl_mem_handle_t
extern ctl_result_t ctlEnumMemoryModules(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_mem_handle_t* phMemory);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_mem_state_t
typedef struct ctl_mem_state_t {
uint32_t Size;
uint8_t Version;
uint64_t free;
uint64_t size;
} ctl_mem_state_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctlMemoryGetState16ctl_mem_handle_tP15ctl_mem_state_t
extern ctl_result_t ctlMemoryGetState(ctl_mem_handle_t hMemory, ctl_mem_state_t* pState);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv414ctl_mem_type_t
typedef enum ctl_mem_type_t {
CTL_MEM_TYPE_HBM = 0,
CTL_MEM_TYPE_DDR = 1,
CTL_MEM_TYPE_DDR3 = 2,
CTL_MEM_TYPE_DDR4 = 3,
CTL_MEM_TYPE_DDR5 = 4,
CTL_MEM_TYPE_LPDDR = 5,
CTL_MEM_TYPE_LPDDR3 = 6,
CTL_MEM_TYPE_LPDDR4 = 7,
CTL_MEM_TYPE_LPDDR5 = 8,
CTL_MEM_TYPE_GDDR4 = 9,
CTL_MEM_TYPE_GDDR5 = 10,
CTL_MEM_TYPE_GDDR5X = 11,
CTL_MEM_TYPE_GDDR6 = 12,
CTL_MEM_TYPE_GDDR6X = 13,
CTL_MEM_TYPE_GDDR7 = 14,
CTL_MEM_TYPE_MAX
} ctl_mem_type_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv413ctl_mem_loc_t
typedef enum ctl_mem_loc_t {
CTL_MEM_LOC_SYSTEM = 0,
CTL_MEM_LOC_DEVICE = 1,
CTL_MEM_LOC_MAX
} ctl_mem_loc_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctl_mem_properties_t
typedef struct ctl_mem_properties_t {
uint32_t Size;
uint8_t Version;
ctl_mem_type_t type;
ctl_mem_loc_t location;
uint64_t physicalSize;
int32_t busWidth;
int32_t numChannels;
} ctl_mem_properties_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctlMemoryGetProperties16ctl_mem_handle_tP20ctl_mem_properties_t
extern ctl_result_t ctlMemoryGetProperties(ctl_mem_handle_t hMemory, ctl_mem_properties_t* pProperties);
typedef struct ctl_freq_handle_t* ctl_freq_handle_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlenumfrequencydomains
extern ctl_result_t ctlEnumFrequencyDomains(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_freq_handle_t* phFrequency);
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_freq_domain_t
typedef enum ctl_freq_domain_t {
CTL_FREQ_DOMAIN_GPU = 0,
CTL_FREQ_DOMAIN_MEMORY = 1,
CTL_FREQ_DOMAIN_MAX
} ctl_freq_domain_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv421ctl_freq_properties_t
typedef struct ctl_freq_properties_t {
uint32_t Size;
uint8_t Version;
ctl_freq_domain_t type;
bool canControl;
double min;
double max;
} ctl_freq_properties_t;
// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv425ctlFrequencyGetProperties17ctl_freq_handle_tP21ctl_freq_properties_t
extern ctl_result_t ctlFrequencyGetProperties(ctl_freq_handle_t hFrequency, ctl_freq_properties_t* pProperties);
|
